Expanding towards the compute continuum

Many pieces have to be put together to realise an operational compute continuum extending from IoT and Edge all the way to cloud and HPC. One of the pieces is secure network connectivity in the presence of dynamic requirements. SmartNICs integrated into HPC systems could play an important role in the future. They are enablers of deep packet inspection at line rate required to facilitate secure high-bandwidth external connectivity. Furthermore, they allow to deploy services at the edge of the HPC network that are needed to support connectivity between the external part of the compute continuum and the HPC system. Dirk Pleiter from KTH and a member of the DECICE consortium addressed these topics in his talk “SmartNICs for Scientific HPC: A Review” during the “Workshop on FPGA/xPU Accelerators for Future HPC and Data Centres”, which took place at HiPEAC 2025 in Barcelona. For more information, see: https://sites.google.com/view/f4hd/home

Author(s): Dirk Pleiter, KTH (Kungliga Tekniska Hoegskolan)